近期活动
编译社区的八卦信息
GCC
[PATCH 0/6] RISC-V: Rewrite target arch attribute handling https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656688.html
[PATCH v1 0/2] Aarch64: addp NEON big-endian fix [PR114890] https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656369.html
[PATCH 0/2] [RISC-V] c implies zca, and conditionally zcf & zcd https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656438.html
[PATCH 0/2] fix RISC-V zcmp popretz [PR113715] https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656509.html
[PATCH 1/2] aarch64: PR target/115457 Implement missing
__ARM_FEATURE_BF16 macrohttps://gcc.gnu.org/pipermail/gcc-patches/2024-July/656385.html[PATCH 1/2]AArch64: make
aarch64_simd_vec_unpack<su>_lo_/_hi_consistent. https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656386.html[PATCH 2/2]AArch64: lower 2 reg TBL permutes with one zero register to 1 reg TBL. https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656387.html
[PATCH][wwwdocs] changes.html changes for AArch64 for GCC 14.1 https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656537.html
[pushed] wwwdocs: gcc-12: Tweak RISC-V default ISA announcement https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656381.html
BINUTILS
[PATCH v1 0/12][Binutils] aarch64: Add support for remaining sve2p1 instructions. https://sourceware.org/pipermail/binutils/2024-July/135515.html
[PATCH v1 0/6] Binutils] aarch64: Add support for sme2p1 instructions. https://sourceware.org/pipermail/binutils/2024-July/135507.html
[PATCH v1 0/4] aarch64: add new Armv9.5-A features and their associated registers (RAS, Debug, Performance Monitor) https://sourceware.org/pipermail/binutils/2024-July/135427.html
[PATCH v2] [RFC]RISC-V:[gprofng] Mimal support gprofng for riscv. https://sourceware.org/pipermail/binutils/2024-July/135401.html
[PATCH] RISC-V: avoid use of match_opcode() in riscv_insn_types[] https://sourceware.org/pipermail/binutils/2024-July/135406.html
GDB
[PATCH v2 0/6] Refinement of scheduler-locking settings https://sourceware.org/pipermail/gdb-patches/2024-July/210419.html
[PATCH v5 0/2] Add amd64 LAM watchpoint support https://sourceware.org/pipermail/gdb-patches/2024-July/210414.html
[PATCH 05/46] gdb, arch, intelgt: add intelgt arch definitions https://sourceware.org/pipermail/gdb-patches/2024-July/210345.html
[PATCH v3 1/2] sim: riscv: fix a divw division by -1 bug https://sourceware.org/pipermail/gdb-patches/2024-July/210380.html
[PATCH v3 2/2] sim: riscv: Simplify the signed div by -1 code https://sourceware.org/pipermail/gdb-patches/2024-July/210381.html
GLIBC
[PATCH v2 1/3] RISC-V: Add a macro definition file to check whether the compiler supports extensions. https://sourceware.org/pipermail/libc-alpha/2024-July/158119.html
[PATCH v2 2/3] RISC-V: Add compiler support check in string-fza.h and string-fzi.h https://sourceware.org/pipermail/libc-alpha/2024-July/158118.html
[PATCH v2 3/3] RISC-V: Use builtins for ffs and ffsll while supported extension available https://sourceware.org/pipermail/libc-alpha/2024-July/158117.html
LLVM/Clang/LLDB/LLD
本节内容来自 LLVM Weekly 第 549 期, Alex Bradbury 大哥持续稳定输出。
有看懂的伙伴分享分享? A couple of papers were shared this week that may be of interest to readers, Verifying Peephole Rewriting In SSA Compiler IRs and Refined Input, Degraded Output: The Counterintuitive World of Compiler Behavior.
先收藏: The 2024-06 C++ committee trip report from /r/cpp contributors is now available.
欢迎加入: Tanya Lattner is seeking new nominations for the LLVM CoC committee members.
这是一个艰难的决定,但我相信是朝着正确的方向: Tom Stellard provided an update on the new criteria for commit access, noting that the number of users with commit access reduced from 1798 to 1471.
国内的伙伴么? Brandon Wu proposed supporting RISC-V vector tuple types in LLVM.
MLIR 的 dialects 感觉每周都上新: Rafael Ubal proposed improvements to the MLIR 'quant' dialect.
好耶! Documentation was added on RISC-V vector codegen. e860c16.
这么快? Initial code for the sandbox vectoriser started to land. f9efc29, d5f5dc9.
QEMU (RISC-V)
[PATCH v6 0/3] RISC-V: Modularize common match conditions for trigger, https://lists.gnu.org/archive/html/qemu-riscv/2024-06/msg00468.html
[PATCH 0/3] util: Add cpuinfo support for riscv, https://lists.gnu.org/archive/html/qemu-riscv/2024-06/msg00478.html
[PATCH] target/riscv: Fix the check with vector register multiples of LMUL, https://lists.gnu.org/archive/html/qemu-riscv/2024-06/msg00483.html
[PATCH v2] disas/riscv: Add decode for Zawrs extension, https://lists.gnu.org/archive/html/qemu-riscv/2024-07/msg00097.html
[PATCH v5 00/13] riscv: QEMU RISC-V IOMMU Support, https://lists.gnu.org/archive/html/qemu-riscv/2024-07/msg00134.html
[PATCH v4 01/11] target/riscv: Add zimop extension, https://lists.gnu.org/archive/html/qemu-riscv/2024-07/msg00150.html
[PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU, https://lists.gnu.org/archive/html/qemu-riscv/2024-07/msg00172.html
RISC-V in China
RT-Thread 社区
- 风平浪静。招募志愿者小编。
TVM / AI Compilers
- 风平浪静。招募志愿者小编。
本周工具链岗位
往期社招及实习生招聘长期有效。
本周推荐阅读
本周推荐:《从中国出发的世界史》
编者: 葛兆光、梁文道
推荐: 小编1号
这三本书不是轻松的重量,两块砖头那么大的体积。大纲和内容由葛兆光老师把握,几十位年轻学者——不一定是历史学——参与了写作。如果已经阅读过一些宏大历史叙事的读者可能一开始会觉得本书并无什么特别。但是当阅读下去,会慢慢的感觉到,视角的不同,看到的历史的另一边,可能会改变或颠覆掉某些细微的、未曾考虑就全盘接受了不知道来源的历史观点。
真实的对立面,很有可能是另一个真实。